ADC - Revision history

Beannaich at 16:09, 25 May 2012

2012-05-25T16:09:48Z

2012-05-25T16:08:21Z

‎Add With Carry

2010-10-26T09:46:24Z

2010-10-26T09:46:13Z

2010-10-25T07:04:41Z

‎Add With Carry

2010-10-25T02:43:46Z

2010-10-25T02:42:34Z

2010-10-25T02:30:59Z

2010-10-25T02:30:36Z

‎Add With Carry

2010-10-25T02:28:04Z

@@ Line 26: / Line 26: @@
 An alternative to this is:
-''half-carry'' = ((A & operand) | ((A ^ operand) & ~(A + operand))) & $08
+''half-carry'' = ((A & operand) | ((A ^ operand) & ~(A + operand + carry))) & $08
 where 'operand' is the register, or immediate byte specified by the instruction.

← Older revision		Revision as of 16:08, 25 May 2012
Line 24:		Line 24:
	''half-carry'' = ((lower nibble of CPU register A) + (lower nibble of the input register) + (carry flag (if set, put 0x1)) > 0xF) ? (boolean true) : (boolean false)		''half-carry'' = ((lower nibble of CPU register A) + (lower nibble of the input register) + (carry flag (if set, put 0x1)) > 0xF) ? (boolean true) : (boolean false)

		+	An alternative to this is:
		+
		+	''half-carry'' = ((A & operand) \| ((A ^ operand) & ~(A + operand))) & $08
		+
		+	where 'operand' is the register, or immediate byte specified by the instruction.

	----		----

← Older revision		Revision as of 07:04, 25 October 2010
Line 18:		Line 18:
	The ''carry'' flag bit is set to 1 if the operation causes a mathematical carry from bit 7.		The ''carry'' flag bit is set to 1 if the operation causes a mathematical carry from bit 7.
	The ''half-carry'' flag bit is set to 1 if the operation causes a mathematical carry from bit 3.		The ''half-carry'' flag bit is set to 1 if the operation causes a mathematical carry from bit 3.
		+
		+	The ''half-carry'' flag can be tricky sometimes to set properly. For this operation it can be recommended that you use some form of the equation below.
		+
		+	''half-carry'' = ((lower nibble of CPU register A) + (lower nibble of the input register) + (carry flag (if set, put 0x1)) > 0xF) ? (boolean true) : (boolean false)

← Older revision		Revision as of 02:43, 25 October 2010
Line 44:		Line 44:
	OP Code #CE		OP Code #CE

−	''n'' is the value of the byte of memory stored at a certain location, where the 16-bit address is the program counter ~~is the memory address being accessed~~. You must increment the program counter after the operation and wrap to a 16-bit length as appropriate.	+	''n'' is the value of the byte of memory stored at a certain location, where the 16-bit address of the memory is the program counter. You must increment the program counter after the operation and wrap to a 16-bit length as appropriate.

← Older revision		Revision as of 02:42, 25 October 2010
Line 44:		Line 44:
	OP Code #CE		OP Code #CE

−	''n'' is the value of the byte of memory stored at ~~the current immediate value~~, where the program counter is the ~~16-bit~~ memory address being accessed.	+	''n'' is the value of the byte of memory stored at a certain location, where the 16-bit address is the program counter is the memory address being accessed. You must increment the program counter after the operation and wrap to a 16-bit length as appropriate.

@@ Line 26: / Line 26: @@
 ''r'' is a CPU register as specified in the table below.
-<center><table style="border: 1px black"><caption>OP Code Instructions:</caption>
+<center><table style="border: 4px ridge black"><caption>OP Code Instructions:</caption>
 <tr><td>#</td><td>Register (in place of ''r'')</td></tr>
 <tr><td>8F</td><td>A</td></tr>

@@ Line 1: / Line 1: @@
 == Add With Carry ==
-This opcode group adds the contents of the variable byte input and the carry flag to the contents of register A, to be stored in register A.
+This opcode group adds the contents of the specified byte-valued input and the register F ''carry'' flag (Flag computed as a 1 or a 0) to the contents of register A, to be stored in register A.
 The formula can be seen as A=A+r+CY. Since register A is an 8-bit register, you must make sure it wraps around appropriately to only contain an 8-bit value in the range of 0-0xFF (0-255).