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		<id>https://gbdev.gg8.se/wiki/index.php?action=history&amp;feed=atom&amp;title=ICD2</id>
		<title>ICD2 - Revision history</title>
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		<updated>2026-04-16T04:34:15Z</updated>
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	<entry>
		<id>https://gbdev.gg8.se/wiki/index.php?title=ICD2&amp;diff=929&amp;oldid=prev</id>
		<title>PinoBatch: Register descriptions, adapted from Fullsnes</title>
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				<updated>2019-10-02T04:42:42Z</updated>
		
		<summary type="html">&lt;p&gt;Register descriptions, adapted from Fullsnes&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;In the Super Game Boy accessory, the '''ICD2''' provides a bridge between the Game Boy system on chip and the Super NES Control Deck.&lt;br /&gt;
It has the following duties:&lt;br /&gt;
&lt;br /&gt;
* Accumulating pixels from the GB LCD output and reformatting them into tile rows for the Super NES to read&lt;br /&gt;
* Collecting 128-bit command packets from the GB's P15 and P14 bits and relaying them to the S-CPU&lt;br /&gt;
* Relaying keypresses from the S-CPU to the GB&lt;br /&gt;
&lt;br /&gt;
== Registers ==&lt;br /&gt;
&lt;br /&gt;
  6000       R  LCD Character Row and Buffer Write-Row&lt;br /&gt;
  6001       W  Character Buffer Read Row Select&lt;br /&gt;
  6002       R  16-Byte Packet Available Flag&lt;br /&gt;
  6003       W  Reset/Multiplayer/Speed Control&lt;br /&gt;
  6004-6007  W  Controller Data for Player 1-4&lt;br /&gt;
  7000-700F  R  16-byte command packet&lt;br /&gt;
  7800-780F  R  Character Buffer Data (320 bytes of currently selected row)&lt;br /&gt;
&lt;br /&gt;
The ICD2 chip decodes only A0-A3,A11-A15,A22 (mask $40F80F).&lt;br /&gt;
Reading unused or write-only addresses appears to return some sort of open bus.&lt;br /&gt;
&lt;br /&gt;
=== $6000 read: LCD Character Row and Buffer Write-Row ===&lt;br /&gt;
&lt;br /&gt;
* 7-3: Current tile row on LCD, or $11 if in vblank (approximates LY)&lt;br /&gt;
* 1-0: Row of ring buffer that the ICD is writing&lt;br /&gt;
&lt;br /&gt;
=== $6001 write: Character Buffer Read Row Select ===&lt;br /&gt;
&lt;br /&gt;
* 1-0: Select row of ring buffer to read out through $7800&lt;br /&gt;
&lt;br /&gt;
This is intended for reading complete buffers that the ICD has filled.&lt;br /&gt;
Reading the incomplete buffer that the ICD is still filling (by setting [$6001] = [$6000] &amp;amp; $03) isn't quite predictable.&lt;br /&gt;
&lt;br /&gt;
=== $6002 read: 16-Byte Packet Available Flag ===&lt;br /&gt;
&lt;br /&gt;
Bit 0 is set to 1 if a new command packet can be read at $7000-$700F. It is cleared to 0 once $7000 has been read.&lt;br /&gt;
&lt;br /&gt;
=== $6003 write: Reset/Multiplayer/Speed Control ===&lt;br /&gt;
&lt;br /&gt;
* 7: Run/reset (0: Reset DMG SoC; 1: Run)&lt;br /&gt;
* 5-4: Number of controllers (0: one; 1: two; 3: four, requiring multitap)&lt;br /&gt;
* 1-0: Clock divider (4, 5, 7, or 9, resulting in 5.37, 4.30, 3.06, or 2.39 MHz)&lt;br /&gt;
&lt;br /&gt;
The SGB system software changes $6003 based on MLT_REQ [[SGB Functions|packets]] sent by the Game Boy program.&lt;br /&gt;
&lt;br /&gt;
== $6004-$6007 write: Controller Data for Player 1-4 ==&lt;br /&gt;
&lt;br /&gt;
These bits are active-low (0: pressed, 1: released).&lt;br /&gt;
They are also nibble-swapped compared to the bit order on the Game Boy Advance.&lt;br /&gt;
&lt;br /&gt;
* 7: Start not pressed&lt;br /&gt;
* 6: Select not pressed&lt;br /&gt;
* 5: B not pressed&lt;br /&gt;
* 4: A not pressed&lt;br /&gt;
* 3: Down not pressed&lt;br /&gt;
* 2: Up not pressed&lt;br /&gt;
* 1: Left not pressed&lt;br /&gt;
* 0: Right not pressed&lt;br /&gt;
&lt;br /&gt;
The Super NES reads its own controllers, reorders the bits, and writes controller data here.&lt;br /&gt;
The ICD then forwards the data one controller at a time to the Game Boy.&lt;br /&gt;
If the number of controllers is greater than one (see $6003), the ICD switches to the next controller when P15 goes low and then both P15 and P14 go high.&lt;br /&gt;
&lt;br /&gt;
=== $7000-$700F read: Command packet ===&lt;br /&gt;
&lt;br /&gt;
The Game Boy program sends 128 bytes of data by manipulating P15 and P14.&lt;br /&gt;
The ICD forwards the packet to the Super NES through these addresses.&lt;br /&gt;
Reading $7000 also clears $6002.&lt;br /&gt;
&lt;br /&gt;
=== $7800 read: Character Buffer Data ===&lt;br /&gt;
&lt;br /&gt;
After selecting a tile row through $6001, copy 320 bytes from this address using fixed source address DMA.&lt;br /&gt;
Usually the copy is bounced off a buffer in WRAM through the WRAM's B Bus port at $2180-$2183.&lt;br /&gt;
(If more than 320 bytes are read, it appears that the next 192 bytes are $FF, and then the 320 bytes of the ''same'' tile row repeat.)&lt;br /&gt;
&lt;br /&gt;
== Timing ==&lt;br /&gt;
&lt;br /&gt;
The Game Boy runs one T-state every 5 cycles of the Super NES's 21.47 MHz master clock. There are 1364 master clocks in a Super NES scanline and 456 T-states in a Game Boy scanline.&lt;br /&gt;
&lt;br /&gt;
* 1364/5 = 272.8 GB tstates per SNES scanline&lt;br /&gt;
* 456*5/1364 = 1.67 SNES scanlines per GB scanline&lt;br /&gt;
* 1364*37/5/456 = 22.1 GB scanlines per SNES vblank&lt;br /&gt;
&lt;br /&gt;
ICD2 stores four tile rows: three completed and one in progress. Over the course of one Super NES vblank, just under three lines will be completed in the ICD2.&lt;br /&gt;
&lt;br /&gt;
* 456*5*8/1364 = 13.4 SNES scanlines to fill one ICD tile row&lt;br /&gt;
* 456*5*24/1364 = 40.1 SNES scanlines to fill three ICD tile rows&lt;br /&gt;
&lt;br /&gt;
Of the 1364 master clocks in a line, 40 are spoken for to refresh Super NES WRAM, which is implemented as DRAM. Memory copies to or from WRAM using the DMA hardware take 8 master clocks per byte.&lt;br /&gt;
&lt;br /&gt;
* (1364-40)/8 = 165.5 bytes per SNES scanline&lt;br /&gt;
* 160*8/4 = 320 bytes per tile row&lt;br /&gt;
* 320/165.5 = 1.9 scanlines to pull one tile row from ICD to WRAM&lt;br /&gt;
* 160*144/4 = 5760 bytes per frame buffer&lt;br /&gt;
* 5760/165.5 = 34.8 scanlines to push front buffer from WRAM to VRAM&lt;/div&gt;</summary>
		<author><name>PinoBatch</name></author>	</entry>

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