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		<id>https://gbdev.gg8.se/wiki/index.php?action=history&amp;feed=atom&amp;title=LD_%288-bit%29</id>
		<title>LD (8-bit) - Revision history</title>
		<link rel="self" type="application/atom+xml" href="https://gbdev.gg8.se/wiki/index.php?action=history&amp;feed=atom&amp;title=LD_%288-bit%29"/>
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		<updated>2026-04-16T04:33:02Z</updated>
		<subtitle>Revision history for this page on the wiki</subtitle>
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	<entry>
		<id>https://gbdev.gg8.se/wiki/index.php?title=LD_(8-bit)&amp;diff=457&amp;oldid=prev</id>
		<title>Beannaich at 12:30, 25 May 2012</title>
		<link rel="alternate" type="text/html" href="https://gbdev.gg8.se/wiki/index.php?title=LD_(8-bit)&amp;diff=457&amp;oldid=prev"/>
				<updated>2012-05-25T12:30:58Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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				&lt;col class='diff-content' /&gt;
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				&lt;tr style='vertical-align: top;'&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='2' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 12:30, 25 May 2012&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;L1&quot; &gt;Line 1:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 1:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;{{Opcode}}&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;{{Opcode}}&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== &lt;del class=&quot;diffchange diffchange-inline&quot;&gt;Load (&lt;/del&gt;8-bit&lt;del class=&quot;diffchange diffchange-inline&quot;&gt;) &lt;/del&gt;==&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;== 8-bit &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;Register Load &lt;/ins&gt;==&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination).&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination).&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;/table&gt;</summary>
		<author><name>Beannaich</name></author>	</entry>

	<entry>
		<id>https://gbdev.gg8.se/wiki/index.php?title=LD_(8-bit)&amp;diff=441&amp;oldid=prev</id>
		<title>Beannaich: Wrote up an initial description of the LD op-codes.</title>
		<link rel="alternate" type="text/html" href="https://gbdev.gg8.se/wiki/index.php?title=LD_(8-bit)&amp;diff=441&amp;oldid=prev"/>
				<updated>2012-05-25T11:10:38Z</updated>
		
		<summary type="html">&lt;p&gt;Wrote up an initial description of the LD op-codes.&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{Opcode}}&lt;br /&gt;
== Load (8-bit) ==&lt;br /&gt;
&lt;br /&gt;
This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination).&lt;br /&gt;
&lt;br /&gt;
The op-codes for this group are encoded as follows:&lt;br /&gt;
&lt;br /&gt;
  01dddsss&lt;br /&gt;
    | || |&lt;br /&gt;
    | |+-+- Source Register&lt;br /&gt;
    +-+---- Destination Register&lt;br /&gt;
  &lt;br /&gt;
  Where 'd' and 's' are values from the following:&lt;br /&gt;
  &lt;br /&gt;
  000: B&lt;br /&gt;
  001: C&lt;br /&gt;
  010: D&lt;br /&gt;
  011: E&lt;br /&gt;
  100: H&lt;br /&gt;
  101: L&lt;br /&gt;
  110: (HL)&lt;br /&gt;
  111: A&lt;br /&gt;
&lt;br /&gt;
Example: LD B,L would be encoded as 01000101 represented in hexadecimal as $45.&lt;br /&gt;
&lt;br /&gt;
'''NOTE: LD (HL),(HL) does not exist, that instruction ($76) executes the HALT instruction.'''&lt;br /&gt;
&lt;br /&gt;
== 8-bit Immediate Load ==&lt;br /&gt;
&lt;br /&gt;
These instructions allow a constant value to be loaded from the program into a register of choice. These commands do not affect any CPU flags, and they require 2 machine cycles to complete.&lt;br /&gt;
&lt;br /&gt;
  00ddd110 nnnnnnnn&lt;br /&gt;
    | |    |      |&lt;br /&gt;
    | |    +------+- Operand&lt;br /&gt;
    +-+------------- Destination Register&lt;br /&gt;
  &lt;br /&gt;
  Where 'n' is the 8-bit immediate, and 'd' is a value from the following:&lt;br /&gt;
  &lt;br /&gt;
  000: B&lt;br /&gt;
  001: C&lt;br /&gt;
  010: D&lt;br /&gt;
  011: E&lt;br /&gt;
  100: H&lt;br /&gt;
  101: L&lt;br /&gt;
  110: (HL)&lt;br /&gt;
  111: A&lt;br /&gt;
&lt;br /&gt;
Example: LD H, $A6 would be encoded as 00100110 10100110 represented in hexadecimal as $26 $A6&lt;/div&gt;</summary>
		<author><name>Beannaich</name></author>	</entry>

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