Gameboy Development Forum

Discussion about software development for the old-school Gameboys, ranging from the "Gray brick" to Gameboy Color
(Launched in 2008)

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#1 2016-10-19 00:43:52

Helios
New member
Registered: 2016-09-26
Posts: 2

Questions about Game Boy display behavior

Hi. I'm writing an emulator and I have a couple questions that I don't see addressed in the pandocs.

1. Exactly when does drawing happen "functionally"? During the VRAM+OAM lockout period or during the hblank period? For example, is it possible to produce a horizontal wave effect by modifying SCY during hblank, or does the display controller copy the value of SCY before hblank?
2. What can be displayed in a sprite's transparent pixels? Only the background/window, or can other sprites be displayed as well?

Thanks.

Last edited by Helios (2016-10-19 00:58:53)

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#2 2016-10-19 03:58:43

nitro2k01
Administrator
Registered: 2008-02-22
Posts: 245

Re: Questions about Game Boy display behavior

1) Drawing happens pixel by pixel from left to right. This happens in the inaccessible periods. This is why they are inaccessible, because the graphics circuitry is accessing VRAM. V/HBlank are the periods when the graphics circuitry is doing nothing such that the CPU can access graphics memory freely.
2) Sprite can be visible through the transparency as well. On old Gameboys, and GBC in non-GBC mode, sprites with lower x coordinate (ie more to the left) have priority over sprites with higher coordinates. On GBC in GBC mode, the priority is decided from the position in the OAM table. Lower position in the table=higher priority.

Have you looked at Pandocs?


Blog: Gameboy Genius
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#3 2016-10-19 19:51:35

Helios
New member
Registered: 2016-09-26
Posts: 2

Re: Questions about Game Boy display behavior

Thanks for your reply.

Yes, my design is primarily informed by the pandocs, with minor input for an Intel manual. However, I didn't see these particular questions addressed in it.

Okay, so drawing happens during STAT mode 3, but does the display controller react to modifications of the graphics IO registers, or does only use whatever value they had when mode 3 started?

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