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- 09:31, 25 May 2012 (diff | hist) . . (+1,368) . . N DAA (Created page with ' +---+---+---+--------------+--------------+--------------+---------+ | N | H | C | Upper Nybble | Lower Nybble | Number Added | C After | +---+---+---+--------------+---------…')
- 09:15, 25 May 2012 (diff | hist) . . (+610) . . N SBC (Created page with 'The operand, along with the Carry flag (C in the F register) is subtracted from the contents of the Accumulator, and the result is stored in the Accumulator. == Instructions == …')
- 09:13, 25 May 2012 (diff | hist) . . (+561) . . N SUB (Created page with 'The operand is subtracted from the contents of the Accumulator, and the result is stored in the Accumulator. == Instructions == SUB B - $90 - 1 Machine Cycle SUB C - $9…')
- 09:09, 25 May 2012 (diff | hist) . . (+174) . . N CPL (Created page with 'The contents of the Accumulator are inverted (one's complement). == Instructions == CPL - $2F - 1 Machine Cycle == Flags == Z: not affected N: 1 H: 1 C: not affected')
- 09:03, 25 May 2012 (diff | hist) . . (+598) . . N CP (Created page with 'The flags are updated as if a SUB instruction had been carried out. The only difference is that the Accumulator is not modified by this instruction. == Instructions == CP …')
- 08:56, 25 May 2012 (diff | hist) . . (+550) . . N OR (Created page with 'A logical OR operation is performed between the byte specified by the operand and the byte contained in the Accumulator; the result is stored in the Accumulator. == Instructions…')
- 08:52, 25 May 2012 (diff | hist) . . (+560) . . N AND (Created page with 'A logical AND operation is performed between the byte specified by the operand and the byte contained in the Accumulator; the result is stored in the Accumulator. == Instruction…')
- 08:48, 25 May 2012 (diff | hist) . . (+571) . . N XOR (Created page with 'The logical exclusive-OR operation is performed between the byte specified by the operand and the byte contained in the Accumulator; the result is stored in the Accumulator. == …')
- 08:30, 25 May 2012 (diff | hist) . . (+7) . . LD (8-bit) (current)
- 08:24, 25 May 2012 (diff | hist) . . (+31) . . Pan Docs (→Cartridges)
- 08:23, 25 May 2012 (diff | hist) . . (+41) . . Pan Docs (→Table of Contents)
- 08:20, 25 May 2012 (diff | hist) . . (+34) . . MBC1
- 08:19, 25 May 2012 (diff | hist) . . (+34) . . MBC2
- 08:18, 25 May 2012 (diff | hist) . . (+34) . . MBC3
- 08:18, 25 May 2012 (diff | hist) . . (+34) . . MBC5
- 08:16, 25 May 2012 (diff | hist) . . (+975) . . MBC5
- 08:14, 25 May 2012 (diff | hist) . . (+3,441) . . N MBC3 (Created page with '== MBC3 (max 2MByte ROM and/or 32KByte RAM and Timer) == Beside for the ability to access up to 2MB ROM (128 banks), and 32KB RAM (4 banks), the MBC3 also includes a built-in Re…')
- 08:13, 25 May 2012 (diff | hist) . . (+1,394) . . N MBC2 (Created page with '== MBC2 (max 256KByte ROM and 512x4 bits RAM) == ===0000-3FFF - ROM Bank 00 (Read Only)=== Same as for MBC1. ===4000-7FFF - ROM Bank 01-0F (Read Only)=== Same as for MBC1, but …')
- 08:10, 25 May 2012 (diff | hist) . . (+2,973) . . N MBC1 (Created page with '== MBC1 (max 2MByte ROM and/or 32KByte RAM) == This is the first MBC chip for the gameboy. Any newer MBC chips are working similiar, so that is relative easy to upgrade a progra…')
- 08:07, 25 May 2012 (diff | hist) . . (+30) . . Timer and Divider Registers (→FF04 - DIV - Divider Register (R/W))
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