SUB
From GbdevWiki
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
The operand is subtracted from the contents of the Accumulator, and the result is stored in the Accumulator.
Instructions
SUB B - $90 - 1 Machine Cycle SUB C - $91 - 1 Machine Cycle SUB D - $92 - 1 Machine Cycle SUB E - $93 - 1 Machine Cycle SUB H - $94 - 1 Machine Cycle SUB L - $95 - 1 Machine Cycle SUB (HL) - $96 - 2 Machine Cycle SUB A - $97 - 1 Machine Cycle SUB $NN - $D6 - 2 Machine Cycle
Flags
Z: 1 if result is zero; 0 otherwise N: 1 H: 1 if borrow from bit 4; 0 otherwise C: 1 if borrow; 0 otherwise