AND
From GbdevWiki
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
A logical AND operation is performed between the byte specified by the operand and the byte contained in the Accumulator; the result is stored in the Accumulator.
Instructions
AND B - $A0 - 1 Machine Cycle AND C - $A1 - 1 Machine Cycle AND D - $A2 - 1 Machine Cycle AND E - $A3 - 1 Machine Cycle AND H - $A4 - 1 Machine Cycle AND L - $A5 - 1 Machine Cycle AND (HL) - $A6 - 2 Machine Cycles AND A - $A7 - 1 Machine Cycle AND $NN - $E6 - 2 Machine Cycles
Flags
Z: 1 if result is zero; 0 otherwise N: 0 H: 1 C: 0