SBC
From GbdevWiki
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
The operand, along with the Carry flag (C in the F register) is subtracted from the contents of the Accumulator, and the result is stored in the Accumulator.
Instructions
SBC B - $98 - 1 Machine Cycle SBC C - $99 - 1 Machine Cycle SBC D - $9A - 1 Machine Cycle SBC E - $9B - 1 Machine Cycle SBC H - $9C - 1 Machine Cycle SBC L - $9D - 1 Machine Cycle SBC (HL) - $9E - 2 Machine Cycle SBC A - $9F - 1 Machine Cycle SBC $NN - $D6 - 2 Machine Cycle
Flags
Z: 1 if result is zero; 0 otherwise N: 1 H: 1 if borrow from bit 4; 0 otherwise C: 1 if borrow; 0 otherwise