Difference between revisions of "LD (8-bit)"
(Wrote up an initial description of the LD op-codes.) |
|||
Line 1: | Line 1: | ||
{{Opcode}} | {{Opcode}} | ||
− | == | + | == 8-bit Register Load == |
This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination). | This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination). |
Latest revision as of 07:30, 25 May 2012
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
8-bit Register Load
This instructions move the contents of a register or memory location into a destination register or memory location. These commands do not affect any CPU flags, and they require 1 machine cycle to complete (Plus 1 machine cycle if (HL) is used as a source or destination).
The op-codes for this group are encoded as follows:
01dddsss | || | | |+-+- Source Register +-+---- Destination Register Where 'd' and 's' are values from the following: 000: B 001: C 010: D 011: E 100: H 101: L 110: (HL) 111: A
Example: LD B,L would be encoded as 01000101 represented in hexadecimal as $45.
NOTE: LD (HL),(HL) does not exist, that instruction ($76) executes the HALT instruction.
8-bit Immediate Load
These instructions allow a constant value to be loaded from the program into a register of choice. These commands do not affect any CPU flags, and they require 2 machine cycles to complete.
00ddd110 nnnnnnnn | | | | | | +------+- Operand +-+------------- Destination Register Where 'n' is the 8-bit immediate, and 'd' is a value from the following: 000: B 001: C 010: D 011: E 100: H 101: L 110: (HL) 111: A
Example: LD H, $A6 would be encoded as 00100110 10100110 represented in hexadecimal as $26 $A6