Difference between revisions of "CP"
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The flags are updated as if a [[SUB]] instruction had been carried out. The only difference is that the Accumulator is not modified by this instruction. | The flags are updated as if a [[SUB]] instruction had been carried out. The only difference is that the Accumulator is not modified by this instruction. | ||
Latest revision as of 08:57, 25 May 2012
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
The flags are updated as if a SUB instruction had been carried out. The only difference is that the Accumulator is not modified by this instruction.
Instructions
CP B - $B8 - 1 Machine Cycle CP C - $B9 - 1 Machine Cycle CP D - $BA - 1 Machine Cycle CP E - $BB - 1 Machine Cycle CP H - $BC - 1 Machine Cycle CP L - $BD - 1 Machine Cycle CP (HL) - $BE - 2 Machine Cycles CP A - $BF - 1 Machine Cycle CP $NN - $FE - 2 Machine Cycles
Flags
Z: 1 if result is zero; 0 otherwise N: 1 H: 1 if borrow from bit 4; 0 otherwise C: 1 if borrow; 0 otherwise
