Difference between revisions of "INC"
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The byte specified by the operand is incremented. | The byte specified by the operand is incremented. | ||
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INC H - $24 - 1 Machine Cycle | INC H - $24 - 1 Machine Cycle | ||
INC L - $2C - 1 Machine Cycle | INC L - $2C - 1 Machine Cycle | ||
| − | INC (HL) - $34 - | + | INC (HL) - $34 - 3 Machine Cycles |
INC A - $3C - 1 Machine Cycle | INC A - $3C - 1 Machine Cycle | ||
== Flags == | == Flags == | ||
| − | Z: 1 if result is zero; 0 otherwise | + | Z: 1 if result is zero; 0 otherwise |
| − | N: 0 | + | N: 0 |
| − | H: 1 if carry from bit 3; 0 otherwise | + | H: 1 if carry from bit 3; 0 otherwise |
| − | C: not affected | + | C: not affected |
Latest revision as of 10:53, 25 May 2012
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
The byte specified by the operand is incremented.
Instructions
INC B - $04 - 1 Machine Cycle INC C - $0C - 1 Machine Cycle INC D - $14 - 1 Machine Cycle INC E - $1C - 1 Machine Cycle INC H - $24 - 1 Machine Cycle INC L - $2C - 1 Machine Cycle INC (HL) - $34 - 3 Machine Cycles INC A - $3C - 1 Machine Cycle
Flags
Z: 1 if result is zero; 0 otherwise N: 0 H: 1 if carry from bit 3; 0 otherwise C: not affected
