Difference between revisions of "Template:Opcode"
From GbdevWiki
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'''Arithmetic and logical:''' [[ADD]] - [[ADD (16-bit) including LD HL,SP+nn]] - [[ADC]] - [[AND]] - [[CP]] - [[CPL]] - [[DAA]] - [[DEC]] - [[DEC and INC (16-bit)]] - [[INC]] - [[SBC]] - [[SUB]] - [[OR]] - [[XOR]] <br /> | '''Arithmetic and logical:''' [[ADD]] - [[ADD (16-bit) including LD HL,SP+nn]] - [[ADC]] - [[AND]] - [[CP]] - [[CPL]] - [[DAA]] - [[DEC]] - [[DEC and INC (16-bit)]] - [[INC]] - [[SBC]] - [[SUB]] - [[OR]] - [[XOR]] <br /> | ||
| − | '''Conditional:''' [[ | + | '''Conditional:''' [[CALL]] - [[JP]] - [[JR]] - [[RET]]<br /> |
'''Load:''' [[LD (8-bit)]] - [[LD (16-bit)]] <br /> | '''Load:''' [[LD (8-bit)]] - [[LD (16-bit)]] <br /> | ||
'''Extended Set:''' [[BIT]] - [[RES]] - [[RL]] - [[RLC]] - [[RR]] - [[RRC]] - [[SET]] - [[SLA]] - [[SRA]] - [[SRL]] - [[SWAP]] | '''Extended Set:''' [[BIT]] - [[RES]] - [[RL]] - [[RLC]] - [[RR]] - [[RRC]] - [[SET]] - [[SLA]] - [[SRA]] - [[SRL]] - [[SWAP]] | ||
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Latest revision as of 00:42, 8 November 2017
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
