Difference between revisions of "DEC"
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(Created page with '{{Opcode}} The byte specified by the operand is decremented. == Instructions == DEC B - $05 - 1 Machine Cycle DEC C - $0D - 1 Machine Cycle DEC D - $15 - 1 Machine…') |
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== Flags == | == Flags == | ||
| − | Z: 1 if result is zero; 0 otherwise | + | Z: 1 if result is zero; 0 otherwise |
| − | H: 1 if borrow from bit 4, 0 otherwise | + | H: 1 if borrow from bit 4, 0 otherwise |
| − | N: 1 | + | N: 1 |
| − | C: not affected | + | C: not affected |
Revision as of 10:28, 25 May 2012
This is an article about the GB-Z80 CPU.
Opcodes:
Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP
The byte specified by the operand is decremented.
Instructions
DEC B - $05 - 1 Machine Cycle DEC C - $0D - 1 Machine Cycle DEC D - $15 - 1 Machine Cycle DEC E - $1D - 1 Machine Cycle DEC H - $25 - 1 Machine Cycle DEC L - $2D - 1 Machine Cycle DEC (HL) - $35 - 2 Machine Cycle DEC A - $3D - 1 Machine Cycle
Flags
Z: 1 if result is zero; 0 otherwise H: 1 if borrow from bit 4, 0 otherwise N: 1 C: not affected
