Difference between revisions of "Template:Instruction"

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(Created page with '= {{{Name}}} = {{{Description}}} == Encoding == {{{Encoding}}} == Flags == Z: {{{Z|-}}} N: {{{N|-}}} H: {{{H|-}}} C: {{{C|-}}}')
 
 
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= {{{Name}}} =
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{{Opcode}}
 
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{{{Description}}}
 
{{{Description}}}
 
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==Encoding==
== Encoding ==
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  {{{Encoding}}}
 
  {{{Encoding}}}
 
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{{#ifexpr: {{#if: {{{Z|}}} | 1 | 0 }} or {{#if: {{{N|}}} | 1 | 0 }} or {{#if: {{{H|}}} | 1 | 0 }} or {{#if: {{{C|}}} | 1 | 0 }} |
== Flags ==
+
==Flags==
 
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  {{#if: {{{Z|}}} | Z: {{{Z}}} | }}
  Z: {{{Z|-}}}
+
  {{#if: {{{N|}}} | N: {{{N}}} | }}
  N: {{{N|-}}}
+
  {{#if: {{{H|}}} | H: {{{H}}} | }}
  H: {{{H|-}}}
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  {{#if: {{{C|}}} | C: {{{C}}} | }} | }}
  C: {{{C|-}}}
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{{#if: {{{Example|}}} |
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==Example==
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{{{Example}}} | }}

Latest revision as of 13:31, 25 May 2012

This is an article about the GB-Z80 CPU.

Opcodes:

Arithmetic and logical: ADD - ADD (16-bit) including LD HL,SP+nn - ADC - AND - CP - CPL - DAA - DEC - DEC and INC (16-bit) - INC - SBC - SUB - OR - XOR
Conditional: CALL - JP - JR - RET
Load: LD (8-bit) - LD (16-bit)
Extended Set: BIT - RES - RL - RLC - RR - RRC - SET - SLA - SRA - SRL - SWAP

{{{Description}}}

Encoding

{{{Encoding}}}